update entire config file to include DGXH100, not just platform options

Author: bartz-nvidia

PyTorch/Classification/ConvNets/configs.yml

@@ -171,6 +171,25 @@ models:
             FP32:
                 <<: *resnet_params_2k
                 batch_size: 128
+        DGXH100:
+            AMP:
+                <<: *resnet_params_2k
+                arch: resnet50
+                batch_size: 256
+                memory_format: nhwc
+            TF32:
+                <<: *resnet_params_2k
+                arch: resnet50
+                batch_size: 256
+        T4:
+            AMP:
+                <<: *resnet_params_2k
+                arch: resnet50
+                batch_size: 256
+                memory_format: nhwc
+            FP32:
+                <<: *resnet_params_2k
+                batch_size: 128
     # }}}
     resnext101-32x4d: # {{{
         DGX1V: &RNXT_DGX1V
@@ -207,6 +226,16 @@ models:
                 <<: *resnet_params_1k
                 arch: resnext101-32x4d
                 batch_size: 64
+        DGXH100:
+            AMP:
+                <<: *resnet_params_1k
+                arch: resnext101-32x4d
+                batch_size: 128
+                memory_format: nhwc
+            TF32:
+                <<: *resnet_params_1k
+                arch: resnext101-32x4d
+                batch_size: 128
     # }}}
     se-resnext101-32x4d: # {{{
         DGX1V: &SERNXT_DGX1V
@@ -233,6 +262,16 @@ models:
                 <<: *resnet_params_1k
                 arch: se-resnext101-32x4d
                 batch_size: 128
+        DGXH100:
+            AMP:
+                <<: *resnet_params_1k
+                arch: se-resnext101-32x4d
+                batch_size: 128
+                memory_format: nhwc
+            TF32:
+                <<: *resnet_params_1k
+                arch: se-resnext101-32x4d
+                batch_size: 128
         T4:
             AMP:
                 <<: *resnet_params_1k
@@ -285,6 +324,16 @@ models:
                 <<: *efficientnet_b0_params_4k
                 arch: efficientnet-widese-b0
                 batch_size: 256
+        DGXH100:
+            AMP:
+                <<: *efficientnet_b0_params_4k
+                arch: efficientnet-widese-b0
+                batch_size: 256
+                memory_format: nhwc
+            TF32:
+                <<: *efficientnet_b0_params_4k
+                arch: efficientnet-widese-b0
+                batch_size: 256
     # }}}
     efficientnet-b0: # {{{
         T4:
@@ -327,6 +376,16 @@ models:
                 <<: *efficientnet_b0_params_4k
                 arch: efficientnet-b0
                 batch_size: 256
+        DGXH100:
+            AMP:
+                <<: *efficientnet_b0_params_4k
+                arch: efficientnet-b0
+                batch_size: 256
+                memory_format: nhwc
+            TF32:
+                <<: *efficientnet_b0_params_4k
+                arch: efficientnet-b0
+                batch_size: 256
     # }}}
     efficientnet-quant-b0: # {{{
         T4:
@@ -369,6 +428,16 @@ models:
                 <<: *efficientnet_b0_params_4k
                 arch: efficientnet-quant-b0
                 batch_size: 256
+        DGXH100:
+            AMP:
+                <<: *efficientnet_b0_params_4k
+                arch: efficientnet-quant-b0
+                batch_size: 256
+                memory_format: nhwc
+            TF32:
+                <<: *efficientnet_b0_params_4k
+                arch: efficientnet-quant-b0
+                batch_size: 256
     # }}}
     efficientnet-widese-b4: # {{{
         T4:
@@ -411,6 +480,16 @@ models:
                 <<: *efficientnet_b4_params_4k
                 arch: efficientnet-widese-b4
                 batch_size: 64
+        DGXH100:
+            AMP:
+                <<: *efficientnet_b4_params_4k
+                arch: efficientnet-widese-b4
+                batch_size: 128
+                memory_format: nhwc
+            TF32:
+                <<: *efficientnet_b4_params_4k
+                arch: efficientnet-widese-b4
+                batch_size: 64
     # }}}
     efficientnet-b4: # {{{
         T4:
@@ -453,6 +532,16 @@ models:
                 <<: *efficientnet_b4_params_4k
                 arch: efficientnet-b4
                 batch_size: 64
+        DGXH100:
+            AMP:
+                <<: *efficientnet_b4_params_4k
+                arch: efficientnet-b4
+                batch_size: 128
+                memory_format: nhwc
+            TF32:
+                <<: *efficientnet_b4_params_4k
+                arch: efficientnet-b4
+                batch_size: 64
     # }}}
     efficientnet-quant-b4: # {{{
         T4:
@@ -495,4 +584,14 @@ models:
                 <<: *efficientnet_b4_params_4k
                 arch: efficientnet-quant-b4
                 batch_size: 64
+        DGXH100:
+            AMP:
+                <<: *efficientnet_b4_params_4k
+                arch: efficientnet-quant-b4
+                batch_size: 128
+                memory_format: nhwc
+            TF32:
+                <<: *efficientnet_b4_params_4k
+                arch: efficientnet-quant-b4
+                batch_size: 64
     # }}}